ASAPatch- Automated, Scalable And Programmable Framework For Post-Silicon Security Remediation

As Systems-on-Chip (SoCs) grow increasingly complex, the validation space expands exponentially, making fully-validated SoCs difficult to attain. This challenge is particularly critical for addressing security bugs related to hardware security. Recent research has shifted towards the possibility of remediating hardware security bugs in the field. In this paper, our goal is to formalize this approach by introducing an automated, scalable, and programmable remediation framework. We present a novel architecture and corresponding programming languages designed for crafting remediation programs, along with an automated framework for ”pragma”-based source code transformation and a compiler for the remediation programs. The remediation architecture demonstrated in this paper can observe up to 143 Kbits and control up to 26 Kbits per mm 2 of logic area with the NanGate 45nm cell library, demonstrating its relevance to be used with modern SoCs.