Randomized trial examines hardware-in-the-loop validation of onboard computer systems in small rockets, highlighting critical design aspects.
Small sounding rockets provide an accessible, cost-effective platform for education and experimental research, especially at universities. In such projects, the onboard computer (OBC) is essential to mission reliability. It is responsible for sensor data acquisition, real-time flight-state detection, data logging, and actuation during recovery events. This work presents the design and implementation of a dedicated OBC for small experimental rockets, together with systematic validation using an integrated hardware-in-the-loop (HIL) simulation framework. The proposed OBC integrates an ARM-based STM32F407 microcontroller, a multi-sensor measurement suite including inertial and barometric sensors, non-volatile data storage, dual pyrotechnic channels, a robust power-management subsystem, and a fully deterministic software architecture tailored for real-time flight-event detection. Complementing the flight hardware, the HIL environment reproduces the electrical, timing, and communication behavior of onboard sensors with high fidelity. Synthetic measurements derived from flight-dynamics simulations are injected through a dedicated interface, enabling end-to-end validation of data acquisition, state-transition logic, and onboard memory logging without requiring physical launches. Experimental HIL results demonstrate reliable detection of high-energy, low-energy, and apogee flight phases under realistic conditions, validating both the hardware design and algorithmic performance. The datasets and design files released with this work provide a reproducible foundation for educational and research activities in similar avionics projects.
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Netzel et al. (2026) studied this question.
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