Bounding Priority Inversion at IPC Endpoints: An AArch64 Microkernel Architecture for Autonomous-Vehicle Control Loops

Autonomous-vehicle platforms increasingly consolidate perception, localization, logging, and safety-critical actuation on the same system-on-chip. This consolidation creates a timing-interference problem: best-effort cognitive workloads may generate bursts of computation and communication that delay lower-level control paths. This paper presents Jido OS, a capability-based AArch64 microkernel architecture designed to bound priority inversion at neural–actuation communication boundaries. The design combines synchronous inter-process communication (IPC), capability-mediated endpoints, transitive priority inheritance, and an immediate priority-ceiling protocol applied at endpoint activation time. A prototype evaluation on an emulated AArch64 target measures IPC round-trip latency using the architectural cycle counter while a 20 Hz control loop is stressed by a cognitive-style workload. Under the evaluated workload, the protected configuration reduced the maximum observed IPC jitter from 38.75 ms in the baseline configuration to 1.4 μs and eliminated observed 20 Hz deadline violations. These results indicate that endpoint-level priority control can substantially improve temporal isolation between cognitive and actuation domains in mixed-criticality autonomous systems.