14-Gb/s 0.115-pJ/bit Time-domain Receiver with Track-and-hold Integrated Voltage-to-time Converter for Low-power Memory Interface

This letter introduces a time-domain receiver (RX) for next-generation low-power memory interfaces. To address the limitations of VSS-terminated signaling, the RX adopts VTT-terminated signaling, which offers improved performance in terms of power consumption, pre-emphasis applicability, and simultaneous switching output noise tolerance. Furthermore, we employ a track-and-hold circuit to prevent voltage-to-time converter gain reduction caused by data transitions. The prototype RX was fabricated in a 65-nm CMOS process and occupied an area of 0.0058 mm². The RX achieved a data rate of 14 Gb/s at a supply voltage of 0.9 V with an insertion loss of -11.8 dB at 7 GHz, and consumed 1.61 mW, resulting in an energy efficiency of 0.115 pJ/bit.