Breaking the voltage plateau barrier: Slope-adaptive state-of-charge estimation for LFP batteries with temperature-aware hysteresis modeling

The open-circuit voltage (OCV) hysteresis effect significantly complicates state-of-charge (SOC) estimation of LiFePO 4 batteries. While prior research has focused on major-loop hysteresis between full charge and discharge, accurately modeling minor-loop hysteresis during partial charge/discharge remains a persistent challenge. This paper proposes a data-driven hysteresis model that incorporates historical SOC and temperature data, with which an adaptive SOC estimator is designed to accommodate slope variations in minor-loop hysteresis. The proposed model accurately captures complex voltage hysteresis across different charge/discharge paths and temperature conditions using deep long short-term memory neural networks trained on hysteresis test data. This OCV component is integrated into a second-order equivalent circuit model, achieving both high-precision battery modeling and computational efficiency. The model parameters are optimized effectively using a multistep parameter identification method enhanced by a meta-heuristic algorithm. The proposed SOC estimator dynamically adjusts its covariance matrices in response to voltage slope variations during the plateau, improving Kalman gain matching to eliminate cumulative errors and enhance accuracy. Extensive experimental results show that over 95% of samples achieve a mean absolute error of less than 0.56% across various usage scenarios. The proposed method outperforms two state-of-the-art methods by 46.2% and 45.7% in root mean square error, demonstrating fast convergence and robust estimation even within the voltage plateau. • Adaptive filtering adjusts to minor-loop OCV slope changes for robust SOC estimation. • Hybrid battery model combines data-driven OCV hysteresis with circuit elements. • Model captures hysteresis under varying charge/discharge paths and temperatures. • Multistep parameter identification optimizes OCV and circuit parameters effectively. • Achieves < 0.56% SOC error in 95% of tests, outperforming state-of-the-art methods.