Cascading Failures in the Semiconductor Supply Chain: A Scale-Free Network Simulation for Resilience Assessment

The global semiconductor supply chain (SSC) depends on a small number of highly connected firms, whose failures can trigger cascading disruptions. This vulnerability is difficult to evaluate with linear models that assume independent disruption propagation because failures in the SSC can spread nonlinearly through load redistribution and upstream input dependencies. To bridge this gap, this study develops a deterministic load-capacity cascade model that combines Barabási–Albert scale-free topology with a Motter–Lai redistribution mechanism under conjunctive upstream supplier constraints. The model’s contribution is to jointly represent hub-driven cascade propagation and tier-specific production dependencies in a five-tier SSC structure. We simulate random failures and targeted hub removals under capacity tolerance levels α∈[0,1]; unless otherwise stated, reported simulation results are averaged over R=100 independent replicates with 95% confidence intervals. The results show that the SSC exhibits a robust-yet-fragile pattern: removing 3% of nodes at α=0.1 leaves 0.748±0.034 final survival under random disruption, but only 0.327±0.005 under targeted hub removal. Under targeted hub removal with f=0.03, increasing capacity tolerance improves resilience, but the improvement is bounded: final survival rises from 0.317 at α=0 to about 0.43 at α=1, with a midpoint-based reference level near α=0.50 that remains within 0.50–0.60 across attack fractions f∈{0.02,0.03,0.05,0.10}. Even at the full-buffer limit (α=1), targeted hub removal caps recovery at Φ*≈0.43 because isolated nodes requiring upstream supply cannot be restored by capacity expansion alone. These findings provide a quantitative basis for SSC resilience design by showing where capacity buffers are effective and where structural supplier diversification is necessary.