Simulation analysis evaluates strain and hetero-dielectric BOX effects on electric characteristics, indicating enhanced performance for low-power circuits.
This work presents a simulation based analysis of the impact of strain and raised hetero dielectric buried oxide (BOX) effects on a planar SOI Tunnel FET featuring a source pocket, hetero-gate and hetero-dielectric BOX configuration. A uniform tensile strain is applied to the source, channel and drain regions. The results show that tensile strain improves the tunnelling characteristics and subthreshold behavior, while the raised hetero-dielectric BOX effectively suppresses ambipolar conduction up to a gate voltage of −1.1 V and reduces the OFF current to 2.19 × 10⁻¹ ⁴ A/µm. The device exhibits a subthreshold swing of 22 mV/dec and an ON current of 62.7 µA/µm. A detailed analysis of the influence of incremental tensile strain and raised BOX structure is provided through quantitative and qualitative comparisons of electrostatic potential, electric field, energy bandgaps, tunneling generation rates, gate capacitance, drain currents and ambipolar conduction at source-channel and channel-drain junctions. The study shows that an appropriate combination of strain and raised BOX dimensions provides an effective trade-off between ON-state performance, OFF-state leakage, and ambipolar suppression, resulting in an ON/OFF current ratio of 0.3 × 10 ¹ ⁰ and near-complete suppression of ambipolar conduction. These characteristics make the proposed device suitable for low-power and complementary circuit applications.
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Haque et al. (2026) studied this question.
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