Mechanisms of Film-Formation-Related Defects in EUV Photoresists for Sub-3 nm Nodes and Synergistic Materials–Process–Intelligence Co-Optimization

With the advancement of High-NA EUV lithography and the continued evolution of transistor architectures toward GAA and CFET, semiconductor manufacturing has entered the sub-3 nm technology node era. At advanced nodes, photon shot noise becomes increasingly significant, while the process tolerance window narrows substantially. Photoresist film-formation-related defects may originate from multiple stages of the fabrication process, including coating, exposure, post-exposure bake, development, and etching/stripping, and are strongly influenced by microscopic stochastic effects. However, the isolated optimization of materials, processes, or intelligent control strategies still suffers from significant limitations. Therefore, this review systematically examines the formation mechanisms and cross-process evolution of photoresist film-formation-related defects within the development trajectory of advanced lithography. An integrated materials–process–intelligence co-optimization framework is proposed to elucidate the coupling mechanisms among these three dimensions and the construction of a full-chain closed-loop control strategy. The current challenges and future development directions are summarized, providing optimization insights for both academic research and industrial implementation. This review aims to establish a defect-control framework integrating fundamental understanding with engineering considerations, thereby supporting low defectivity, high robustness, and improved manufacturability for sub-3 nm node patterning.