Electronic structures and phonon-limited electron mobility of double-gate silicon-on-insulator Si inversion layers

Electronic structures and the phonon-limited electron mobility of inversion layers have been studied at 300 K for the thin Si (100) layer of double-gate (DG) silicon-on-insulator (SOI) structures by using a one-dimensional self-consistent calculation and a relaxation time approximation. Both symmetric and asymmetric DG SOI systems have been investigated. The self-consistent calculation presents the electronic structures specific to DG SOI Si inversion layers and the range of the specific electronic structures as functions of Si layer thickness tSi and the vertical effective electric field Eeff. Outside this range, the mobility behavior as a function of Eeff is almost identical to that of bulk Si inversion layers. In this range, however, as tSi decreases, the phonon-limited electron mobility μph increases gradually to a maximum around tSi=10 nm, decreases for tSi=10–5 nm, rises rapidly to another maximum in the vicinity of tSi=3 nm and finally falls. The former gradual increase in the mobility μph results from a reduction of phonon scattering caused by the interaction of upper and lower inversion layers. For tSi of less than approximately 10 nm, the mobility of each subband is reduced by an enhancement of scattering rates due to a confinement effect in general. However, the rapid increase of the fraction of electrons in the lowest energy subband that has a higher mobility than other subbands brings about the latter mobility increase in the vicinity of tSi=3 nm.