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The commonly observed hysteresis in the transfer characteristics of MoS2 transistors is typically associated with charge traps in the gate insulator. Since in Si technologies such traps can lead to severe reliability issues, we perform a combined study of both the hysteresis as well as the arguably most important reliability issue, the bias-temperature instability. We use single-layer MoS2 FETs with SiO2 and hBN insulators and demonstrate that both phenomena are indeed due to traps in the gate insulator with time constants distributed over wide timescales, where the faster ones lead to hysteresis and the slower ones to bias-temperature instabilities. Our data show that the use of hBN as a gate insulator considerably reduces the number of accessible slow traps and thus improves the reliability. However, the reliability of hBN insulators deteriorates with increasing temperature due to the thermally activated nature of charge trapping.
Illarionov et al. (Mon,) studied this question.
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