A Code‐Invariant QSG–VGA Co‐Design Methodology for Compact CMOS Vector‐Sum Phase Shifters

A circuit‐level co‐design methodology for compact vector‐sum phase shifters is presented and applied to a code‐invariant common‐gate variable‐gain amplifier (VGA) combined with a resistorless quadrature signal generator (QSG). The VGA uses unary active, polarity‐selection and dummy branches, so that the quadrature generator and the output summing node see an almost constant number of conducting devices for all phase states. This property enables a resistorless RLC quadrature signal generator in which the VGA input resistance replaces the explicit resistors of a conventional all‐pass I/Q network. A proof‐of‐concept circuit has been designed in a 65 nm CMOS technology to operate over the 17–22 GHz frequency range. The circuit provides 32 phase states with a nominal resolution of 11.25°. Post‐layout/EM simulations of the complete phase shifter show RMS phase and gain errors below 4.1° and 0.42 dB, respectively, with power consumption below 16 mW.