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January 1, 1989IEEE Journal of Solid-State Circuits

A 200-MHz CMOS phase-locked loop with dual phase detectors

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Authors

KWK.M. WareHLH.-S. LeeSeoul National University of Science and TechnologyCSC.G. SodiniIIT@MIT

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Ware et al. (1989) studied this question.

synapsesocial.com/papers/6a6e6cc9ac440176ef278aefhttps://doi.org/10.1109/4.44991
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