This paper describes the physical limits of VLSI dynamic random-access memories (dRAM's). To achieve memory capacities in the multimegabit range, the significant limits inherent in conventional dRAM technology must be identified and overcome. Limits associated with cell components may be circumvented using an approach that treats the dRAM as a subsystem, affording the opportunity to trade off cell scaling with new approaches to cell and storage array layout as well as sensing-circuit design. New limits determined by denser cell geometry, cosmic-ray protons, sense-amplifier thermal noise, and vertical fields in the storage-capacitor insulator then enable memory storage capacities to be extended to a range in excess of 64 Mbits.
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Lewyn et al. (1985) studied this question.
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