Key result
The proposed 40-nm CMOS digital-based bio-signal amplifier achieved an input-referred noise of 160.6 nV/√Hz and consumed 230 nW with a noise efficiency factor of 2.96.
The proposed digital-based bio-signal amplifier achieves high area and power efficiency suitable for ultra-low-power implantable bio-sensor nodes.
May support low-power bio-signal acquisition in cardiac devices; leaves open clinical validation before adoption.
This paper presents a low-power, energy-efficient bio-signal amplifier based on an improved Muller-C digital OTA, achieving reasonable noise performance. The system symmetry and non-linearity are significantly improved by the decoupled differential-mode/common-mode detection logic and a customized symmetric differential-mode detection logic (SDMDL). A cascaded Muller-C (CMC) input stage with stage-by-stage offset calibration reduces the input offset to 0.35 mV. To achieve stable sampling amplification, the self-oscillating loop is replaced by an external precision clock. Combined with chopping, the amplifier achieves an input-referred noise (IRN) of 160.6 nv/√HZ;. Fabricated in 40-nm CMOS, the design occupies 0.031 mm2 and consumes only 230 nW under 0.3V/0.5V supply voltages at 128 kHz clock frequency. With a noise efficiency factor (NEF) of 2.96, power efficiency factor (PEF) of 8.8, and total harmonic distortion (THD) of 0.1%.
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Wang et al. (2025) studied this question. Digital-based low noise bio-signal amplifier with SDMDL and CMC input stage vs. Analog-based and previous digital-based amplifiers was evaluated. The proposed 40-nm CMOS digital-based bio-signal amplifier achieved an input-referred noise of 160.6 nV/√Hz and consumed 230 nW with a noise efficiency factor of 2.96.
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