A highly linear analog frequency ramp generator based on a fractional divider concept is presented. The frequency ramp linearity achievable in this fractional phase-locked-loop configuration is better than 10/sup -4/. This value is revealed by numerical simulations as well as by measurements performed. With a prototype synthesizer implemented in a FMCW-radar system suitable for distance and velocity measurements.
No takes yet. Share an insight, caveat, or question.
Musch et al. (1999) studied this question.
Synapse has enriched one closely related paper. Consider it for comparative context: