A new algorithm is given for reducing the number of additions and subtractions required in binary division in a computer. The algorithm is presented in two parts. A simplified algorithm, which can significantly reduce the number of operations with minimal additional circuitry, is used to develop the justification of the method. The complete algorithm introduces modifications which allow the minimum number of operations by examination of no more than the leading five bits of the divisor and remainder. An average of two-thirds can be saved in the number of operations.
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Wilson et al. (1961) studied this question.
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