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This two-part paper reviews recent innovations in circuit design that have accelerated the miniaturization of sensor nodes. In this second part of the paper, we focus on key building blocks of miniaturized sensor nodes, such as data transceivers, energy harvesters, power management units, and digital logic circuits. System level design considerations are also discussed to provide guidelines for the design of a miniaturized system. As an example prototype design, a 2.7-cm3global navigation satellite system (GNSS) logger is proposed. This paper includes a die-stacked sensor platform composed of an ARM cortex M0 processor, energy harvester, power management unit, solar cell, optical receiver, sensor layer, and RF transmitter that exploits the discussed design techniques for ultra-low power operation. The GNSS logger can store GNSS signals of >1 k positions on a single battery charging without additional energy harvesting.
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Jang et al. (2017) studied this question.
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