This paper aims to provide a road map for selecting power devices in soft-switched, megahertz (MHz) frequency power converters. Minimizing COSSlosses, which occur when charging and discharging the parasitic output capacitor of power semiconductors, is critical to efficient operation. These losses are excluded from manufacturer-provided information, and measurements are either sparse or not reported at all in the existing literature. We report the first high-frequency COSSloss data from silicon carbide (SiC) power MOSFETs, with a range of devices tested from 1 to 35 MHz and up to 800 V. In contrast to GaN HEMTs, COSSlosses in SiC MOSFETs do not increase with dV/dt at these frequencies. A total of 3%-10% of the stored energy is dissipated in the measured SiC MOSFETs. We report new COSSloss measurements for vertical silicon MOSFETs and expand on existing measurements for superjunctions, finding high variance in COSSlosses between devices for both constructions. High COSSlosses preclude the tested silicon MOSFETs from efficient operation at MHz frequencies. Lastly, we compare devices in soft-switched applications using a loss calculation that includes these COSS losses, and demonstrate a 100 W, 17 MHz dc-RF inverter using a custom-packaged SiC MOSFET.
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Zulauf et al. (2018) studied this question.
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