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July 28, 2009IEEE Journal of Solid-State Circuits

A 5-Gb/s/pin Transceiver for DDR Memory Interface With a Crosstalk Suppression Scheme

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KOKwang-Il OhChung-Ang UniversityLKLee‐Sup KimKorea Advanced Institute of Science and TechnologyKPKwang‐Il ParkGyeongsang National University

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Oh et al. (2009) studied this question.

synapsesocial.com/papers/6a71cef231a3df824329d272https://doi.org/10.1109/jssc.2009.2022303
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