A 200-ps-Response-Time Output-Capacitorless Low-Dropout Regulator With Unity-Gain Bandwidth >100 MHz in 130-nm CMOS

An output-capacitorless low-dropout regulator (OCL-LDO) using enhanced multipath nested Miller compensation with embedded feedforward path for system-on-chip (SoC) applications is presented in this paper. While state-of-the-art LDOs are restricted to low-frequency operation with a maximum unity-gain bandwidth (UGB) typically ranging from several hundred kilohertz to no higher than 10 MHz even in advanced technologies (65 nm or beyond), the prototype fabricated in a standard 130-nm CMOS process features over 100-MHz UGB for all loading conditions up to 25-mA output current while consuming a quiescent current of 112 μA. With this ultra-wide bandwidth, the proposed LDO achieves 200-ps response time for load transient with 300-ps edge time. The extension of UGB also magnificently contributes to improvement of power-supply rejection (PSR), making it comparable to OCL-LDOs that use ripple-feedforward techniques to specifically boost PSR or LDOs with large off-chip decoupling capacitors, while enjoying much faster speed. The chip area is 0.008 mm2.