High aspect ratio hole filling by tungsten chemical vapor deposition combined with a silicon sidewall and barrier metal for multilevel interconnection

A newly developed processing for high aspect ratio hole filling by tungsten chemical vapor deposition, combined with a Si sidewall technique and resist etch back is proposed. A high aspect ratio hole (around 3) was completely filled with W and W-Si alloy without voids. It is also proposed to interpose a TiN/TiSi2 layer between W and Si, in order to suppress rapid silicidation of W at high temperatures above 800 °C. Silicidation rates for W/TiN/TiSi2/Si systems were 2–2.5 orders of magnitude lower than W/Si systems. Electrical contact resistivity was kept to be lower than 1×10−5 Ω cm2 even after 900 °C annealing by suppressing rapid silicidation of W.