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The electrical characteristics of polycrystalline silicon layers are closely related to their grain structure. This paper describes a comprehensive study of the grain growth of polysilicon under a wide range of doping and processing conditions. A grain‐growth model has been developed and implemented in the SUPREM process simulator, and the simulated results are compared to those obtained by transmission electron microscopy for As‐, P‐ and B‐doped polysilicon. These results indicate that n‐type dopants increase the growth rate whereas the p‐type dopant has a negligible effect.
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Mei et al. (1982) studied this question.
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