We developed a stacked horizontal channel type floating gate (HC-FG) NAND memory; a 3-D stacked NAND array composed of conventional FG cells. With this cell structure, a wide program/erase (P/E) window is obtained, accompanied by superior read disturb immunity, P/E endurance, and data retention. In addition, we propose a low-cost layer select transistor (LST) that is easily integrated with the HC-FG cell. Because the 3-D memory composed of the HC-FG cell and the LST has good compatibility with conventional fabrication technology, further bit cost scaling is expected.
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Sakuma et al. (2013) studied this question.
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