A novel phase-change memory cell with a double- confinement structure was proposed and fabricated in this work. By having an additional bottom Ge2Sb2Te5layer under the electrically confined active region, the heat loss can be effectively prevented. The temperature uniformity over the active region significantly improves and so does the thermal efficiency. Therefore, a low IRESETof about 0.3 mA and a reset power can be achieved. For the SET performance, a pulsewidth as low as 200 ns can be used without compromising the RSET.
No takes yet. Share an insight, caveat, or question.
Chao et al. (2007) studied this question.
Synapse has enriched 5 related papers. Consider them for comparative context: