Electrical and noise characterization of bottom-gated nanocrystalline silicon thin-film transistors

Bottom-gated n-channel thin-film transistors were fabricated on nanocrystalline silicon (nc-Si) layers, deposited at 230°C by plasma-enhanced chemical vapor deposition. The transfer characteristics were measured in devices with different channel dimensions, exhibiting front and back channel conduction. The change of the device parameters with channel dimensions is explained in terms of the trap density in the bulk of the nc-Si layer extracted from space charge limited current measurements in n+-nc-Si-n+ structures and both front∕back interface traps determined from the slopes associated with the front and back channel conduction. The overall results suggest the existence of regions of high trap density at the back interface near the source and drain n+ contacts, whereas the reduction of the back channel conduction with decreasing the channel width can be attributed to the sidewall edge effect. The gate insulator trap concentration of 1.5×1019cm−3eV−1 was deduced from the noise data.