Answers are grounded in this paper and cite their sources.
P-type two-dimensional steep-slope negative capacitance field-effect transistors are demonstrated for the first time with WSe 2 as channel material and ferroelectric hafnium zirconium oxide in gate dielectric stack. F4-TCNQ is used as p-type dopant to suppress electron leakage current and to reduce Schottky barrier width for holes. WSe 2 negative capacitance field-effect transistors with and without internal metal gate structures and the internal field-effect transistors are compared and studied. Significant SS reduction is observed in WSe 2 negative capacitance field-effect transistors by inserting the ferroelectric hafnium zirconium oxide layer, suggesting the existence of internal amplification (∼10) due to the negative capacitance effect. Subthreshold slope less than 60 mV/dec (as low as 14.4 mV/dec) at room temperature is obtained for both forward and reverse gate voltage sweeps. Negative differential resistance is observed at room temperature on WSe 2 negative capacitance field-effect-transistors as the result of negative capacitance induced negative drain-induced-barrier-lowering effect.
No takes yet. Share an insight, caveat, or question.
Si et al. (2018) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: