The author presents an algorithm for estimating the sampling time offsets encountered at the parallel sampling paths of an ultra-high-speed waveform digitizing system which is realized by interleaving many sample-hold and A/D (analog/digital) converter modules. One obvious application of this algorithm is to feed these estimates back to adjustable delay units in all the sampling paths to compensate the sampling-time offsets. Simulation results indicate that with an 8-bit quantizer the residual timing error can be reduced to just about 0.05% of the sampling period.>
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Y.-C. Jenq (1990) studied this question.
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