Electrical Characteristics of Memory Devices With a High-kHfO₂$ Trapping Layer and Dual $SiO₂/Si₃N₄$ Tunneling Layer

A novel device structure with a high-k HfO2charge storage layer and dual tunneling layer (DTL) (SiO2/Si3N4) is presented in this paper. Combining advantages of the high trapping efficiency of high-k materials and enhanced charge injection from the substrate through the DTL, the device achieves a fast program/erase speed and a large memory window. The device demonstrates excellent retention due to its physically thick DTL and also improved endurance without any increase of programming Vththroughout the cyclic test as compared with SONOS Flash memory devices using an Si3N4trapping layer.