A Highly Efficient V-Band Dual-Harmonic-Driven Frequency Doubler

A V-band frequency doubler with a dual-harmonic-driven push-push core with a pair of accumulation-mode MOS (AMOS) varactors at the input is presented. The nonlinear characteristics of the varactor introduce 2f0into the input, which is amplified and added to the rectified 2f0at the output of the push-push core. This facilitates high DC-to-RF efficiency. AMOS varactors with odd symmetric C-V characteristics are used to efficiently create 2f0.The doubler is implemented in 28nm bulk CMOS technology, achieving an output power of −2.4 to 0.2 dBm and drain efficiency of 13.6 to 20.2% at frequencies of 50–64 GHz. The core size of the chip is 0.053 mm2, which is the smallest among reported V- and E-band frequency doublers.