Answers are grounded in this paper and cite their sources.
In this article, we demonstrated a high-throughput gate-level-pipelined 8-bit multiply-accumulate (MAC) unit with a long feedback loop using low-voltage rapid single-flux quantum (LV-RSFQ) logic. The long feedback loop in the MAC unit is an obstacle for high-throughput operation because the logic gates must wait for the delayed inputs from the feedback loop. The LV-RSFQ logic makes high-frequency operation even more difficult by larger and more variable feedback delay. We design the feedback loop by using counter-flow clocking and adding many D flip-flops to divide the long feedback loop into shorter paths. The target clock frequency of the MAC unit with a feedback loop was set to 30 GHz by the experimental results of the MAC unit without a feedback loop. We model the clock frequency and its circuit overhead in a feedback loop to design the feedback loop in the MAC unit achieving 30 GHz with a minimum overhead. The test chips are fabricated using the national institute of advanced industrial science and technology (AIST) 10-kA/cm²Advanced Process 2. We have successfully obtained high-throughput 30-GHz operations in the LV-RSFQ MAC unit with a long feedback loop by using the model-based design. The maximum operating frequency of the MAC unit reaches 40 GHz.
No takes yet. Share an insight, caveat, or question.
Nagaoka et al. (2023) studied this question.
Synapse has enriched 10 related papers. Consider them for comparative context: