A silicon MEMS structure for characterization of femto-farad-level capacitive sensors with lock-in architecture

This paper presents a silicon MEMS capacitive structure to investigate a test methodology for fF-level capacitive sensors' measurement. The device mimics a capacitive sensor with a changing intermediate layer between the electrodes. A single mask bulk micromachining process is used to fabricate the device, which has a nominal capacitance of 1.2 fF. A high performance measurement setup based on lock-in principle is developed to detect the capacitance variation. The maximum capacitance variation of the fabricated device is 0.31 fF, and the capacitance detection limit is 0.095 aF Hz −1/2 .