A 180-nm Voltage-Controlled Magneto-Electric RAM With Sub-1-ns Switching Time

This is the authors' abstract. We don't add key points for this paper.

Memory performance has emerged as a critical factor influencing both system speed and energy efficiency. However, conventional memory technologies such as embedded Flash (eFlash) and static RAM (SRAM) encounter significant scalability limitations beyond the 28-nm CMOS node. Among novel emerging memory technologies, spin-transfer-torque magnetic RAM (STT-MRAM) has gained prominence due to its high-speed operation, non-volatility, and superior endurance, positioning it as a promising candidate for storage-class and cache memory applications. Nevertheless, the energy-intensive write mechanism of STT-MRAM poses a fundamental limitation to its broader adoption. In this work, we present the first CMOS-integrated implementation of a novel memory technology called the magneto-electric RAM (MeRAM) that utilizes voltage-controlled magnetic anisotropy (VCMA) for write operations, achieving sub-nanosecond switching speeds and ultralow energy consumption. The integration process, associated challenges, and circuit solutions are thoroughly discussed, including the development of a unique memory access circuitry tailored for MeRAM. The experimental results from multiple MeRAM chips fabricated in a 180-nm CMOS process are provided, showcasing key device characteristics and memory performance metrics. This work demonstrates the first fully operational, CMOS-integrated MeRAM chips, achieving sub-1-ns switching time, 8.85-pJ/bit write energy, and 1.95-pJ/bit read energy in a 180-nm CMOS technology node.