Research on Multilevel-Cell Master-Slave Random PWM Selective Harmonic Elimination Inverter

Multilevel inverters have significant advantages in medium- and high-voltage applications, but harmonic distortion and electromagnetic interference caused by fixed-frequency modulation remain practical obstacles in engineering deployment. This paper proposes a multilevel-cell master-slave random PWM selective harmonic elimination inverter control scheme. The power stage adopts a three-unit cascaded H-bridge topology, and a master-slave hierarchical control architecture is developed to achieve DC bus voltage balancing, with simulation results showing a balancing error below 0.5%. A dual randomization mechanism combining random carrier frequency and random pulse position is then introduced to disperse concentrated harmonic energy and reduce harmonic peak amplitude by 50.5%, enabling compliance with the CISPR 11 Class A electromagnetic compatibility standard. To solve the nonlinear selective harmonic elimination equations, an improved Multi-Verse Optimizer algorithm is proposed, achieving a switching-angle convergence success rate of 96.4% and a target-order harmonic elimination rate above 97%. A joint optimization framework combining random PWM and selective harmonic elimination is further constructed to balance output total harmonic distortion, dynamic response, and robustness under varying load conditions. The final system achieves an output THD of 1.93%, dynamic response time of 38 ms, and stable performance over a wide load range. Simulation and experimental curves show close agreement, verifying the validity and engineering feasibility of the proposed strategy for harmonic suppression, electromagnetic compatibility, and high-performance power conversion systems.