Fpga-Based Chirp Generator for High Resolution Uav Sar

This paper discusses the design and development of a FPGA-based chirp generator for high resolution Unmanned Aerial Vehicle (UAV) Synthetic Aperture Radar. The desired bandwidth of the chirp signal is 100 MHz (combination of I and Q channels) with a chirp rate of 5 MHz/s. Two algorithms based on the Memory-based architecture and the Direct Digital Synthesizer (DDS) architecture are presented. The measurement results indicate that the DDS chirp generator is a preferred choice for high-resolution SAR application.