Measurement of Superconductive Voltage Drivers up to 25 Gb/s/ch

We report on demonstrations of a superconductive voltage driver (SVD), which generates non-return-to-zero (NRZ) output with an SFQ pulse input, up to 25 Gb/s/ch. The NRZ SVD consists of a coding logic, splitters, buffers, sixteen RS flip-flops (RSFFs), and DC-biased serially connected sixteen 2-junction SQUIDs. Each SQUID is magnetically coupled to the storage loop of each RSFF. The coding logic generates the true and complement signals of the SVD's input data, and the true and complement signals are split into sixteen with the splitters, amplified with the buffers, and applied to the RSFFs as the set and reset signals, respectively. With this configuration, the SQUIDs generate about 2-mV-high NRZ output voltage. The NRZ SVD was fabricated with our 10-kA/cm2Nb process and measured with our cryocooled system. Eye diagram of the NRZ SVD measured at 25 Gb/s/ch clearly opened, indicating low-bit-error-rate (BER) operation. Measured BER was less than 1times10-13at 20 Gb/s/ch for 27-1 pseudo-random bit sequence input.