Dislocation generation of GaAs on Si in the cooling stage

I n situ measurements are carried out for the etch pit density (EPD) of GaAs on Si at growth temperature using a newly developed HCl-GaCL vapor phase etching method. The EPD obtained is 4×104 cm−2 at growth temperature. However, after the temperature cools down to room temperature, the EPD is 8×106 cm−2 using molten KOH etching. GaP on Si is also carried out, and almost the same result is obtained; that around 107 cm−2 dislocations are generated in the cooling stage. This is the first evidence that thermal stress in the cooling stage determines the quality of GaAs and GaP heteroepitaxial layers on Si.