In the design of registers for controlling a digital process, it is often desired to count through a sequence of specified length and terminate the count by returning to the initial state. A penalty is associated with the use of a straightforward binary code for such counters because of the large number of diodes required to implement the counter, and because of the pyramiding effect which heavily loads the flip-flops representing the least significant bits.
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C. Hugh Mays (1965) studied this question.
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