Transmitter and receiver DSP for 112 Gbit/s PAM-4 amplifier-less transmissions using 25G-class EML and APD

The transmission performance of 112 Gbit/s PAM-4 signal with commercial 25 G-class EML and APD is experimentally studied by using advanced digital signal processing (DSP) algorithms, i.e. pre-equalization (Pre-EQ), error-table based pre-correction (ETC), least-mean square (LMS) based equalization, direct detection faster than Nyquist (DD-FTN) algorithm. Among them, Pre-EQ and ETC are implemented at the transmitter, and ETC is a symbol-pattern-dependent pre-compensation algorithm based on the look-up-table approach. In order to obtain these pre-compensated parameters readily, a joint equalization and error table generation (JEEG) module is proposed. Employing the combination of ETC, LMS, and DD-FTN, a single line 112 Gbit/s PAM-4 40 km amplifier-less transmission with a record receiver sensitivity of -16.6 dBm (at 7% HD-FEC threshold) is experimentally demonstrated. In addition, the computational complexities of different DSP schemes are analyzed and discussed in detail. The receiver computational complexity can be effectively reduced by employing appropriate ETC and Pre-EQ in the transmitter.