An Improved Finite-Time Control Strategy for Zero-Sequence Circulating Current Suppression of Parallel Three-Level Rectifiers

Parallel three-level rectifiers are widely employed to increase the power rating and efficiency of high-power converters. However, the zero-sequence circulating current (ZSCC) will occur due to the zero-sequence voltage difference between the parallel-operated converters, which can lead to current distortion and system loss. Therefore, an improved finite-time controller is proposed for mitigating the ZSCC in this article. A generalized model for ZSCCs in a parallel three-level rectifiers' system is developed for designing the proposed controller. The stability against system parameter perturbation has been studied. Compared with the traditional finite-time controller and PI controller, this new control strategy can achieve better performance and stronger disturbance rejection without increasing the hardware cost. The proposed control scheme has been verified under different input currents and inductances by simulation and experimental results.