Gate bias-stress induced hump-effect in transfer characteristics of amorphous-indium-galium-zinc-oxide thin-fim transistors with various channel widths

A hump in the subthreshold regime of the transfer characteristics is reported for amorphous-indium-galium-zinc-oxide thin-film transistors (TFTs) when they are exposed to large positive gate bias-stress. As stress time progresses, transfer characteristics shift in two opposite directions; the main transistor shifts in the positive, while the hump shifts in the negative gate-voltage direction. The hump occurs at the same current level in all TFTs with channel widths ranging from 10 to 200 μm, which supports the exclusion of bulk and back surface effects. We therefore propose the accumulation of positive charge at the interface of the channel edges, along the channel width direction, as the origin of the hump effect.