InAs FinFETs With Hfinnm Fabricated Using a Top–Down Etch Process

We report the first demonstration of InAs FinFETs with fin widthW_finin the range 25–35 nm, formed by inductively coupled plasma etching. The channel comprises defect-free, lattice-matched InAs with fin heightH_fin=20nm controlled by the use of an etch stop layer incorporated into the device heterostructure. For a gate lengthL_g=1~μ m, peak transconductanceg_m, peak=1430~μ S/μ mis measured atV_d=0.5V demonstrating that electron transport in InAs fins can match planar devices.