This paper describes the present status of research on emerging nanoscale silicon devices that take full advantage of new physical phenomena which appear in silicon nanostructures. This new physics includes quantum effects that enhance the performance of MOS transistors and single-electron charging effects that add new function to conventional CMOS circuits. These physical phenomena may be used to extend the scaling and performance limits of conventional CMOS.
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Hiramoto et al. (2006) studied this question.
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