Physical Model of Noise Mechanisms in SOI and Bulk-Silicon MOSFETs for RF Applications

The noise mechanisms at high frequencies in MOSFETs are analyzed and an analytical model is presented for devices operating at gigahertz frequencies. The proposed model is applied to floating body silicon-on-insulator (SOI) as well as bulk-silicon MOS transistors and experimentally verified. The model accounts for the mechanisms of 1) channel thermal noise; 2) shot-noise due to impact ionization; and 3) substrate back-gate-coupled thermal noise. Compact, closed-form analytical expressions of the noise power spectral density and the minimum noise figure (NF) are presented. At the same technology level, the experimental data and the model show that SOI MOSFETs are able to attain lower NF than bulk-silicon devices by reduction of the back-gate transconductance. However, the higher drain electric field in the SOI, and the parasitic bipolar action and floating body enhance impact-ionization-associated shot-noise, which becomes the limiting noise mechanism at drain voltages higher than the drain onset voltage of ldquokinkrdquo effect. A correlation between the onset voltage and the DC electrical characteristics is shown.