A design strategy for micropower switched-capacitor filters is presented and illustrated with the design of a multipurpose second-order section. The filter, realized in a double-poly 6-/spl mu/m CMOS process, consumes 237 /spl mu/W if it is used as an equalizer (f/SUB c/=90 kHz, -V/SUB DD/=3 V) and only 72 /spl mu/W if it is used as a bandpass filter for 8 channels (f/SUB c/=192 kHz, V/SUB DD/=3 V). The dynamic range of the filter is over 60 dB and the total chip area is 3.5 mm/SUP 2/, including bonding pads.
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Degrauwe et al. (1984) studied this question.
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