In a high-speed digital radio relay system with four-phase-shift keying and coherent detection, it is very important to realize an accurate, stable, and wide-band carrier synchronizer. In this paper, the influence of time delay causing trouble for the wide-band synchronizer realization is analyzed. Then the design procedure of this synchronizer is described. Finally, the realizability of such a synchronizer is proved by the experimental results at a 1.7-GHz intermediate frequency and a 200-MHz clock frequency.
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Yamamoto et al. (1972) studied this question.
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