The anomalous leakage current ILin LPCVD polysilicon MOSFET's is attributed to field emission via grain-boundary traps in the (front) surface depletion region at the drain, and an analytic model that describes the strong dependences of ILon the gate and drain voltages is developed. The model predictions are consistent with measured current-voltage characteristics. Physical insight afforded by the model implies device design modifications to control and reduce IL, and indicates when the back-surface leakage component is significant.
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Fossum et al. (1985) studied this question.
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