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An experimental 27 Gbit/s 1:2 regenerating demultiplexer IC based on AlGaAs/GaAs HBTs has been implemented, which features an input sensitivity of 55 mV peak to peak and a phase margin of 270° at the SONET STS-192 rate of 9.95 Gbit/s. The circuit was fabricated in a high current gain baseline HBT technology, and occupies an area of 1.15×1 mm2.
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Runge et al. (1991) studied this question.
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