Identification and measurement of scaling-dependent parasitic capacitances of small-geometry MOSFET's

The scaling dependence of the gate-to-source capacitance in strong accumulation C/sub gs//sup acc/ is investigated for the first time to study the parasitic capacitances for MOSFETs with different gate-lengths. Results show a gate-length L/sub gate/ dependent characteristic for C/sub gs//sup acc/ and is consistent with the results from numerical device simulation. The result is found to be different from the widely used assumption in the literature, and is believed to be reported for the first time. The gate-length dependent C/sub gs//sup acc/ characteristic is due to the top side capacitance, and is verified through careful device characterization and numerical device simulation. A measurement technique is further developed to determine C/sub top/ for small geometry MOSFETs. The technique is demonstrated on actual transistors with no special test devices required. Based on the technique, a sub-linear dependent relationship is found for the dependence of C/sub top/ on L/sub gate/, and is in close agreement with the results predicted by theory. Results also indicate that C/sub top/ is about 8-13% of the measured total C/sub gs//sup acc/, which corresponds to a nonnegligible portion of the total capacitance, and needs to be considered for future device design, characterization and modeling. The impact of C/sub top/ on CMOS inverter gate delay is also investigated. Results indicate C/sub top/ adversely impact the gate delay by as much as 5.5% as supply voltage is scaled down to 1 V.