A Millimeter-Wave CMOS Series-Doherty Power Amplifier With Post-Silicon Inter-Stage Passive Validation

This article presents a wideband series-Doherty power amplifier (SDPA) for millimeter-wave (mm-wave) fifth-generation (5G) applications. It features a compact two-step impedance inverting-based series-Doherty power combiner that provides broadband close-to-perfect power back-off (PBO) efficiency enhancement. The amplitude-to-amplitude (AM–AM)/amplitude-to-phase (AM–PM) performance of the load-modulated Doherty power amplifier for broadband operation is analyzed. We also devise a post-silicon inter-stage passive validation (PSIV) approach to evaluate the mm-wave chip prototype utilizing the embedded voltage root mean square detectors. The proposed SDPA is realized in a 40-nm bulk CMOS, and it delivers 20.4 dBmPSATwith 39.1%/34% PAE at 0-/6-dB PBO. Over a 23.5–30 GHz band, its PAE is >24% at 6-dB PBO. At 27 GHz, applying a “2 GHz 16-quadratic-amplitude modulation (QAM) orthogonal frequency-division multiplexing (OFDM)” signal, the proposed SDPA generates 10.2 dBm average power with 18.9% average PAE. The average error vector magnitude is better than −24.5 dB without digital predistortion for a “400-MHz 64-QAM OFDM” signal while generating an average output power of 8.8 dBm with 15% PAE. The AM–AM/AM–PM of the realized SDPA is investigated by employing a “50-MHz 64-QAM OFDM” signal, validating our analysis and showing that the linearity limitation of DPAs is systematic and predictable. Utilizing the proposed PSIV approach, the frequency response of the input/inter-stage passive circuits is measured, indicating an excellent agreement with 3-D electromagnetic (EM) simulation results.