An architecture and implementation issues for an almost-all-optical packet switch that does not rely on recirculating loops for storage implementation are presented. The architecture is based on two rearrangeably nonblocking stages interconnected by optical delay lines with different amounts of delay. The probability of loss and the switch latency as a function of link utilization and of the size of the switch are investigated. In general, with proper setting of the number of delay lines, the switch can achieve an arbitrarily low probability of loss. Growability patterns and extension of the design to the dense wavelength-division-multiplexing (WDM) case are also shown. In particular, an extension to the architecture whereby, through the use of WDM, the switch capability can be increased several times, with only minor changes to the switch design is discussed. Additionally, issues involving practical implementation of such a switch are considered. For example, a scheme that allows optical packet synchronization for the synchronously-operated switch is shown. Using this scheme, the switch can be a central component in the design of future all-optical, packet-switched networks.>
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Zygmunt J. Haas (1993) studied this question.
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